1. Field of the Invention
The present invention relates to a voltage clamp circuit, and a semiconductor device, an overcurrent protection circuit, a voltage measurement probe, a voltage measurement device, and a semiconductor evaluation device respectively using the voltage clamp circuit. More particularly, the present invention relates to a voltage clamp circuit that transmits an input voltage to an output node when the input voltage is lower than a clamping voltage and that fixes a voltage at the output node to the clamping voltage when the input voltage is higher than the clamping voltage, and a semiconductor device, an overcurrent protection circuit, a voltage measurement probe, a voltage measurement device, and a semiconductor evaluation device respectively using the voltage clamp circuit.
2. Description of the Background Art
Recently, high breakdown voltage semiconductor switching elements such as field-effect transistors (FETs) and insulated gate bipolar transistors (IGBTs) have achieved high performance as the development of power electronics has advanced. In particular, since achieving low loss is the most important challenge, on-resistance, which is directly linked to loss of power, needs to be as low as possible. For this purpose, accurate measurement of on-resistance is indispensable. Recent high breakdown voltage semiconductor switching elements frequently perform high-speed operations, and therefore only the on-resistance calculated from the direct-current (DC) characteristics is not sufficient as a guideline for the performance. To provide an effective performance guideline during the switching operation, the dynamic on-resistance is to be measured. This dynamic on-resistance measurement, however, involves difficulties.
That is, in a semiconductor switching element during the switching operation, the high voltage and low current state (during the off-state) repeatedly alternates with the low voltage and high current state (during the on-state). The measurement of dynamic on-resistance is typically performed by observing waveforms using an oscilloscope to allow changes with time from the high voltage and low current state (during the off-state) to the low voltage and high current state (during the on-state) to be followed.
In measurements of voltage waveforms with an oscilloscope, unless the voltage waveforms are within the same range both during the on-state and during the off-state, the characteristics of an amplifier inside the oscilloscope are distorted, resulting in failure to accurately measure the voltage waveforms. The voltage waveforms therefore need to be measured in a range wide enough for high voltage during the off-state, that is, the power supply voltage. This, however, reduces the accuracy of the measurement for low voltage, which is necessary for the measurement of dynamic on-resistance. For example, in a case where the voltage during the on-state is O.1 V and the power supply voltage is 100 V, an oscilloscope has to be set in a range not less than 100 V. In this case, even if the accuracy of a high-accuracy oscilloscope is 1% of the full scale, the accuracy is 1 V with a voltage range of 100 V. The measured value is completely unreliable. To address this issue, a semiconductor evaluation device that can measure voltage between terminals of a semiconductor switching element in a low voltage range has been devised.
FIG. 10 is a circuit diagram showing a configuration of such a semiconductor evaluation device. In the semiconductor evaluation device shown in FIG. 10, a source of a semiconductor switching element (N-type field-effect transistor) 70 to be evaluated is grounded, a gate thereof is connected via a resistance element 71 to a pulse generating circuit 72, and a drain thereof is connected via a resistance element 73 and a current detector 74 to a DC power supply 75. The drain of semiconductor switching element 70 is connected via a voltage clamp circuit 76 to a first input terminal T1 of an oscilloscope 80, and a second input terminal T2 and a third input terminal T3 of oscilloscope 80 are connected to current detector 74 and the gate of semiconductor switching element 70, respectively.
Voltage clamp circuit 76 includes a resistive element 77 connected between an input node N77 and an output node N78, and a diode 78 and a Zener diode 79 connected in series between output node N78 and the line of a ground voltage GND. Input node N77 is connected to the drain of semiconductor switching element 70, and output node N78 is connected to first input terminal T1 of oscilloscope 80. The resistance value of resistive element 77 is, e.g., 1 MΩ, and a Zener voltage Vz of Zener diode 79 is, e.g., 2 V. Accordingly, a voltage Vout at output node N78 is limited to be at most Vz, and therefore the range of the voltage at first input terminal T1 of oscilloscope 70 may be set to one wide enough for Vz.
FIG. 11A is a time chart showing a gate voltage Vg of semiconductor switching element 70, and FIG. 11B is a time chart showing output voltage Vout of voltage clamp circuit 76. Gate voltage Vg is alternately switched between a low voltage Vgoff and a high voltage Vgon. When Vg is Vgoff, semiconductor switching element 70 is turned of, so that a drain voltage Vin of semiconductor switching element 70 becomes approximately DC power supply voltage (100 V) while output voltage Vout of voltage clamp circuit 76 is fixed to a clamping voltage Vc=Vz. When Vg is raised from Vgoff to Vgon, semiconductor switching element 70 is turned on, so that drain voltage Vin abruptly drops, and when Vin becomes not more than Vc=Vz, Vout=Vin. For example, if the measurement is performed in a voltage range of 2 V by using oscilloscope 80 having a resolution of 10 bits, the measurement accuracy is 0.002 V, sufficiently allowing the measurement of an on-state voltage of 0.1 V.
There is also a semiconductor evaluation device in which with a switch connected between a semiconductor switching element and an oscilloscope, the voltage between terminals of the semiconductor switching element is compared with the reference voltage and the switch is turned on as the voltage between terminals becomes lower than the reference voltage (see, for example, Japanese Patent Laying-Open No. 2001-004670).
In conventional voltage clamp circuit 76, however, if gate voltage Vg is raised from low voltage Vgoff to high voltage Vgon (time t1), output voltage Vout is gradually decreased to on-state voltage Von because of time delay due to the CR time constant caused by resistive element 77 and parasitic capacitance and time delay due to the recovery time (reverse recovery time) of diodes 78 and 79. Thus, there has been a problem in that during high-speed operations in which the period of turning on and off of semiconductor switching element 70 is less than 1 microsecond, the characteristics of semiconductor switching element 70 cannot be accurately evaluated.
In addition, in a device that is switched on as the voltage between terminals of a semiconductor switching element becomes lower than the reference voltage, the response speed of the switch is several hundred nanoseconds. With this device, the characteristics of a semiconductor switching element have been unable to be accurately evaluated during high-speed operations in which the on/off period of semiconductor switching element 70 is less than 1 microsecond.